Printed circuit board (PCB) miniaturization by embedded passives and sequential build-up (SBU)process methodology

Mahesh G Varadarajan, Kang J Lee, Swapan K Bhattacharya, Raghuram Pucha, Rao R Tummala, Suresh Sitaraman


One of the foremost design considerations in microelectronics miniaturization is the use of embedded passives which provide practical solution. In a typical circuit, over 80% of the electronic components are passives such as resistors, inductors, and capacitors that could take up to almost 50% of the entire printed circuit board area. By integrating passive components within the substrate instead of being on the surface, embedded passives reduce the system real estate, eliminate the need for discrete and assembly, enhance electrical performance and reliability. This paper presents an entire process from design and fabrication to electrical characterization and reliability test of embedded passives on multilayered microvia organic substrate. Numerical models of embedded capacitors have been developed to qualitatively examine the effects of process conditions and electrical performance due to thermo-mechanical deformations. Also, a prototype working product with the board-level design including features of embedded resistors and capacitors is presented.


Embedded capacitor; embedded resistor; PWB fabrication; thermo-mechanical reliability; SOP; embedded passives

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